Multifunctional plasmonic gates using the effect of voltage on the surface plasmons frequency change

Considering the benefits of plasmonic technology in reducing the scattering limit on bends and low losses, as well as the small size of the element, the development of this technology has accelerated. In this paper, the effect of voltage application on changing the frequency of surface plasmons is investigated. By applying an external voltage to the metal plates and creating a magnetic field, the density of the electrons on the metal surface changes; thus, surface plasmons resonance frequency shifts. To this end, a multifunctional plasmonic gate with a dimension of 95 nm × 95 nm was designed and simulated to evaluate this effect. This structure is suitable for use as AND, NOR, NOT, XOR, and NAND gates. The contrast ratio between the change of state from logic "0" to logic "1" is approximately 29 dB, and the transfer ratio (transmittance ratio) of output in logic "1" is over 85%. The proposed device has low dimensions, a high contrast ratio, and a high transmittance ratio. This device uses four gates: AND, NOR, NOT, XOR, and NAND, which can be achieved in plasmonic integrated circuits with the wavelength division multiplexing (WDM) technique.